The present invention relates to a voltage comparator circuit and, more particularly, to a voltage comparator circuit formed in a bipolar integrated circuit.
A conventional voltage comparator circuit is known which uses a set of differential paired transistors as disclosed in U.S. Pat. No. 3,649,846 issued to T. M. Frederiksen, et al. and assigned to Motorola. A conventional window comparator circuit is also known which uses two sets of differential paired transistors as disclosed in U.S. patent application Ser. No. 262,498 assigned to the present applicant. The former voltage comparator circuit uses only a single inverting (threshold) voltage, while the latter window comparator circuit has two inverting voltages. However, the conventional comparator circuits having one or two inverting voltages cannot be used in a variety of applications.